FIG. 2 shows a production method for semiconductor device according to the prior art.
In FIG. 2, a region of a semiconductor substrate 1a is activated by ion implantation thereby to produce an active layer 1b. Photoresist pattern 4 is deposited on the semiconductor substrate 1a including the active layer 1b, as a mask for producing source/drain electrodes. Source and drain electrodes 5 are deposited on the active layer 1b. Photoresist pattern 6 is deposited thereon, as a mask for producing a gate electrode. A gate electrode 7 is deposited at a position between the source and drain electrodes 5.
An aluminum electrode, titanium-gold laminated electrode, titanium-molybdenum-gold laminated electrode or the like are used for the gate electrode 7 and nickel metal, gold-germanium alloy or the like are used for the source/drain electrodes. Because the materials for the source/drain electrodes and that for the gate electrode are different from each other, it is impossible to form these electrodes with a single mask.
Accordingly, production of electrodes in the prior art method is conducted in separate processes using different masks as described in the following.
First of all, a region of the semiconductor substrate 1a is activated by ion implantation thereby to produce an active layer 1b (FIG. 2(a)). Resist pattern 4 which has apertures at the source/drain electrode regions is deposited thereon (FIG. 2(b)). Next, the source and drain metal is evaporated and lifted off to produce source/drain electrodes 5 (FIG. 2(c)).
Next, resist pattern 6 for producing a gate electrode is deposited thereon and an aperture is opened at desired position by mask alignment (FIG. 2(d)). Thereafter, a recess is formed in substrate 1a in the aperture portion. Gate metal is evaporated and deposited over the entire surface of partially completed device. The gate metal on resist 6 is lifted off, thereby to produce the gate electrode 7 (FIG. 2(e)).
In this prior art production method for semiconductor device, since resist is patterned by mask alignment when producing a gate electrode, the distances between source/drain electrodes and the gate electrode vary within a substrate or over a number of substrates due to mask alignment error. These distance variations result in variations in the characteristics of the field effect transistor produced.